1. Field of the Invention
The invention relates to methods, apparatus, and systems utilizing Viterbi algorithms in a digital channel decoder. More specifically the invention relates to methods, apparatus, and systems for determining 1T state metric differences from an nT implementation of a Viterbi decoder devoid of 1T metric information.
2. Discussion of Related Art
In most present digital communication channels, information is encoded in a manner to improve reliability of the transmitted information in the presence of imperfect or noisy communication channels. Exemplary of such communication channels are digital voice and data communication channels utilizing, for example, RF modulation for transmission of digital data. Another exemplary application of such digital channels are storage devices with read/write channels that write digital information using optical or magnetic modulation techniques for later recovery through a corresponding read channel.
One common decoding algorithm is known as the Viterbi algorithm. Broadly speaking, the Viterbi algorithm is a dynamic programming algorithm that determines the most likely sequence of states that result in a sequence of observed events in the received signal. This most likely sequence of states then defines the decoded symbol based on the path of most likely values of the observed events. In general, the Viterbi decoder determines the most likely sequence of events that may be the underlying cause of an observed sequence of events. In other words, the Viterbi decoder determines the most likely sequence of encoded data bits represented by a received sequence of modulated events.
Improvements to the Viterbi algorithm known as the soft output Viterbi algorithm (“SOVA”) improve upon prior algorithms by including reliability or probability information for each decoded bit of the decoded symbol and, by accumulating this bit-wise reliability or probability information, a reliability or probability value associated with the most likely decoded symbol can be generated. Basic concepts of the SOVA techniques and common applications thereof are well known to those of ordinary skill in the art and are notoriously disclosed by Hagenauer and Hoeher in 1989 in the paper entitled “A Viterbi Algorithm With Soft-Decision Outputs and its Applications” (IEEE 1989 and incorporated herein by reference). The SOVA algorithms utilize branch metric information associated with each branch from the first state to each of two subsequent, potential follow-on states to determine the most likely branch for a next sensed event. Hagenauer and Hoeher first taught that the difference in accumulated branch metric information between the most likely and second most likely paths of the Viterbi detector in response to each sensed event is a useful approximation of the log-likelihood ratio (“LLR”) used in the SOVA techniques to determine reliability of the surviving path (e.g., reliability of the decoded bit). This state metric difference (“SMD”) is therefore used to implement SOVA techniques in present Viterbi decoders.
Those of ordinary skill in the art will readily recognize that the state metric and branch metric information discussed herein, or simply discussed herein as metric information, is also sometimes referred to as “path metric” information.
In earlier Viterbi algorithm state machines, each bit or received event is received or sensed on a corresponding cycle of an applicable clock signal. The clock signal generally cause a transition of the state machine to determine the most likely bit value for the sensed event based on past sensed events and corresponding branch metric information. In other words, each clock cycle of the Viterbi algorithm state machine corresponds to decoding of one bit of the encoded symbol. Branch metric information is therefore encoded in association with each possible transition corresponding to each clock cycle operable in the Viterbi algorithm state machine. Such Viterbi decoders in which each clock pulse corresponds to processing of one event (e.g., decoding of a next bit) are referred to in the industry and herein as “1T” Viterbi decoders.
As the data rate (e.g., “baud” rate) for application of Viterbi decoders has increased, many present day decoders utilized a “2T” decoder structure such that each clock cycle decodes a sequence of two consecutive bits of the encoded symbol. Such a 2T decoder implementations has four possible transitions from a current state to a next state based upon a sensed the event representation of two encoded bits. Thus the clock rate of the Viterbi decoder state machine is typically half that of the data/baud rate of transmitted information. More generally, modem Viterbi decoders may utilize a clock rate that is an integer fraction of the corresponding data rate. In other words, an “nT” Viterbi decoder may use a clock that has a frequency of l/n times the data rate. Thus each clock pulse in an nT Viterbi decoder represents n bits of the symbol to be decoded. Thus an nT Viterbi decoder is operable in accordance with an nT state machine.
Such nT state machines typically provide branch metric information for each of the four possible transitions from each state to a corresponding next state. Provision of such nT branch metric information makes application of SOVA techniques more complicated. The Hagenauer and Hoeher SOVA techniques presume that branch metric information, and hence state metric differences, are determinable for each sensed event such as in a 1T implementation of a Viterbi decoder. However, such information is not generally available in an nT implementation of a Viterbi decoder.
It is evident from the above discussion that an ongoing need exists to usefully apply SOVA techniques in an nT state machine implementation of a Viterbi decoder to provide 1T state metric difference information for the SOVA implementation.